It is known in the art to employ charge coupled devices (CCDs) in optical array imagers. CCD imager arrays conventionally comprise a semiconductor substrate, such as silicon, and a gate insulator layer disposed on one surface of the semiconductor substrate. A plurality of electrodes are formed on the gate insulator layer in order to store and transport charge accumulated in the adjacent substrate.
Several varieties of CCD imagers have been developed. The first kind developed was the three-phase CCD imager array, wherein every third electrode was connected to a particular voltage clock, there being three voltage clocks in all. In order for this CCD imager array to properly operate, the electrodes must be spaced relatively close together, such as 1 micron apart, in order to assure that the charge accumulated in a well underneath any particular electrode gate could be transported to the next well formed underneath an adjacent electrode.
Before the present invention, it had not been possible to form a three-phase CCD imager array from a single electrode layer with submicron gap geometrics. Previously, it had been attempted to form a plurality of electrodes from a single layer of polysilicon, the electrodes being selectively doped areas of the layer. It was discovered, however, that when the layer was annealed, the dopants in the doped polysilicon electrodes would migrate out of the desired areas and cause increased and variable conductivity between the electrodes. Certain prior art CCD imagers would operate at room temperature, but could not operate in cold conditions.
In order to avoid these problems, conventional three-phase CCD imagers have been built with a multilayer electrode structure, wherein successive layers of electrodes are deposited and then insulated from the next electrode level. Subsequent to the first level, the remaining levels partially overlap the previously deposited levels in order to maintain a continuity of electrode surface relative to the semiconductor substrate. For each additional level fabricated, problems of registration and manufacturing complexity increase.
Another conventional solution to this problem has been the introduction of two-phase, one-and-one-half-phase, and virtual-phase CCD imagers, each of which have progressively fewer electrodes but a progressively more complex, differentially doped semiconductor substrate. While the problem of shorts in between the electrodes is progressively alleviated in these structures, problems associated with correct doping conditions and relative registration of the doped areas increase.
Tin oxide has conventionally been employed to fabricate CCD imagers. However, the particular advantageous properties of tin oxide relative to polysilicon have not been fully exploited. Further, the conventional steps for depositing and doping tin oxide are less than optimum in terms of their rate of production, quality and reproducibility. In particular, in situ or predoping techniques have been employed that raise the conductivity of tin oxide electrodes up to acceptable levels, but these techniques require a subsequent tin oxide etching step. A need therefore exists in the industry to develop a tin oxide CCD imager that can be fabricated in a relatively short time with minimum number of process steps, that has a high quality, and that takes advantage of the inherent properties of tin oxide.